What are EFLX eFPGA benefits

Use eFPGA to Flexibly Control Data Paths for Higher Speed and Lower Cost

You can integrate an x-nm FPGA into a x-nm SoC and keep the flexibility and the performance of the original FPGA using eFPGA.

But you can do better: in many designs the data paths can be hardwired for higher performance/lower cost while keeping the control path fully programmable using carefully written RTL. OR you can use this to integrate 7nm or 16nm FPGA into 22/28nm SoCs. See this article for examples.

Cut power, reduce latency and cost by integrating FPGA into your SoC

FPGAs burn a lot of power: most of it for the high speed SERDES/PHYs and overdrive. When integrating an eFPGA into the SoC you eliminate the SERDES on both sides and dramatically reduce power and latency of the system. Also reducing cost by eliminating the huge silicon area of the SERDES/PHYs and other fixed IP that may not be used. Some say this can be as much as a 10x reduction in power and cost depending on the FPGA! There is a detailed article here.

Low Power eFPGA

When we port EFLX eFPGA to a process node we can optimize for maximum performance or for minimum power or somewhere in between depending on the application.

There are many possibilities for managing power including
  • voltage range
  • Vt settings
  • breaking out power rails
  • power gating
  • back bias

eFPGA in Space

EFLX eFPGA is designed using standard cells (we can do this because our interconnect is half the area).

So if a customer gives us Rad-Hard-By-Design standard cells and storage elements, we can use these and the eFPGA port will be Rad-Hard-By-Design.  We are not Rad Hard experts but when we are given additional design guidelines/rules, for example for clocks and resets, we have implement these as well.  

We have done two Rad-Hard eFPGA designs: 180nm and 12nm.  The product brief for the EFLX Rad-Hard eFPGA in GF 12LP/LP+ is available here.

eFPGA Made in the USA

We have EFLX eFPGA available on two USA wafer fabs: GF 12LP/LP+ manufactured in Malta, New York (near Albany) and Sandia 180nm manufactured at Sandia’s own fab in Albuquerque.

Our resources are located in the USA and EFLX eFPGA can be ported to any process node in 6-12 months but have worked with all our customers in parallel proving a LEF file in as little as 2 months.