Originally from Edmonton, Canada. BSc, Computer Science, University of Alberta. MBA Harvard. MSEE (coursework), Santa Clara University. 1979-1990 AMD, Senior VP, Microprocessors and Logic with >500 direct reports. 1990 joined 2 PhD founders as founding CEO to grow Rambus from 4 people to IPO to $2 Billion market cap, till 2005. Director of Everspin, the leading MRAM company.
senior VP Software & Engineering
Originally from Shanghai, PRC. BSEECS, UC Berkeley. Two years as VLSI designer at Zoran. MSEE, EE PhD UCLA: designed 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Cheng has led the architecture, silicon implementation and software development for eFPGA over two generations from 180nm-7nm and now neural inferencing. Multiple patents at UCLA and Flex Logix.
VP IP Sales, Marketing & solutions architecture
Originally from Scottsdale, AZ. BS Chemical Engineering, Arizona State University. Over 20 years of sales and sales management experience starting as Account Sales Manager at Motorola for Apple, Sun, SGI then Director Strategic Accounts at ARM. Moved to ARC as VP Sales, North America. When Virage acquired ARC, became VP Global Accounts and lead worldwide sales effort for ARC. When Synopsys acquired Virage, was interim VP Worldwide Sales for Virage/ARC, then transitioned into Director of Product Solution Sales coordinating all ARC sales activities for Synopsys in North America. During Andy’s time selling ARC, it became the #2 embedded processor by unit market share.
vp Hardware Engineering
Originally from Pune, India. BSEE University of Utah. MSEE Stanford. MBA San Jose State. Abhijit has led the silicon implementation of EFLX eFPGA in 180nm, 40nm, 28nm, 16nm, 14nm, 12nm and now in design of 7nm and nnMAX inference in 16nm. Abhijit’s team is also in implementation of NMAX in 16nm. Over 20 years experience in silicon and system design at LTX then Rambus where he was Senior Engineering Director and Technical Director. Has managed over 100 people in high speed digital logic, mixed signal, system, verification and software teams. His projects have resulted in millions of chips and systems sold by companies such as Intel, Sony, IBM, Toshiba and others.
Originally from Edmonton, Canada. Bachelors Business Economics, UC Santa Barbara. MBA Wharton School, University of Pennsylvania. Corporate Controller at several companies including QED and PMC-Sierra where she spent 8 years ending up as VP and Treasurer. Subsequently CFO and VP of Operations of several other companies.
VP Inference Sales, Marketing & solutions architecture
Originally from San Antonio, Texas. Bachelors of Science in Electrical Engineering, University of Texas at San Antonio. Most recently Dana was VP, North American Sales for ARM. Previously he was VP Global Sales of MaxLinear and before that VP, Asia Sales for Broadcom. Dana has lived 6 years in Shanghai and Taipei. Originally Dana was a Test and Product Engineer at AMD. Dana is our Site Executive for our new Austin Texas office.
Originally from Pozega, Serbia. Professor of EE at UCLA: PhD Supervisor of Cheng Wang and Fang-Li Yuan. 2007 D. Sakrison Memorial Prize, 2009 NSF Career Award, 2010 ISSCC Jack Raper Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper.
co-founder and managing Partner of lux capital
Co-founder and Managing Partner of Lux Capital (luxcapital.com), based in Palo Alto CA. Focuses on investments in technology and energy. Started at Lehman Brothers in Equity Research, led the spin off of Lux Research and founded Lux Capital. Peter manages investments in Accelergy, Angstrom, Auris, Everspin, Flex Logix, G2X, Gridco, Lux Research, Luxtera, Matterport and Transphorm. Graduated cum laude from Syracuse University’s Newhouse School.
General partner of eclipse ventures
General Partner of Eclipse Ventures (eclipse.vc), based in Palo Alto CA. Started at Transitron before joining Dr. Gordon Moore’s team at Fairchild where he oversaw development of the first generation of digital ICs. Co-founded National Semiconductor where he was VP/GM of ICs. He also was CEO of two companies. Joined Sequoia as a General Partner where he was Chairman of Cypress Semi, Microchip, Vitesse Semi, Open-Silicon, Redback Networks, Verisity and Plumtree. He was also a Director at Mellanox, YouTube and Xoom. As a General Partner at Khosla Ventures he served on the boards of Skybox (Google), Cogenra (Sunpower), SEEO (Bosch), Avogy, SeaMicro (AMD) and HeartVista. He current sits on the Eclipse boards of Diassess, Flex Logix, Kindred, and Light. Graduated from Toulouse University with a BSEE/MS Physics.
BSc, Computer Science, University of Alberta. MBA Harvard. MSEE (coursework), Santa Clara University. 1979-1990 AMD, ending up as Senior VP, Microprocessors and Logic with >500 direct reports. 1990 joined 2 PhD founders as founding CEO to grow Rambus from 4 people to IPO to $2 Billion market cap, till 2005. Ran a solar company and served on several high tech boards since then. Board member of Everspin Inc.
SENIOR VP ENGINEERING
BSEECS, UC Berkeley. Two years as VLSI designer at Zoran. MSEE, EE PhD UCLA: 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Multiple patents at UCLA and Flex Logix.
Partner at Lux Capital, focusing on investments in technology and energy, based in Palo Alto CA. Previously held technical positions at GM and several Silicon Valley technology startups. BSEE UC Berkeley. MSEE, EE PhD UCLA.