Flex Logix expands on industry-leading eFPGA customer base
If you’re interested in a career in reconfigurable HW/SW solutions, Flex Logix is right for you.

You can learn more and have more opportunities for growth at an innovative startup company like Flex Logix which is the leader in reconfigurable computing SW/HW solutions.

We have more than 60 patents and applications for inventions that give us a fundamental competitive advantage in programmable interconnects and reconfigurable tensor computing for AI and DSP.

Our technology is already working in >20 chips at dozens of customers and our market adoption is growing rapidly. Work with some of the biggest systems and chip companies in the world and some of the smartest SW/HW developers on our team.

You can work for us either in our Austin TX office or our Mountain View CA office.

How to Apply

Only apply if you are highly qualified, very smart, super-motivated, willing to work hard and are interested, challenged and motivated by the kind of technology we develop.

Tell us which job you are interested in and send us your resume or linked-in page link using the attached form and the hiring manager will get back to you promptly.

Principal Verification Engineer

Senior Engineer/Principal


Verification Engineer involved in functional verification of embedded FPGA cores in different process nodes.

Responsible for all aspects of verification including:

  • Development of verification testbenches using SystemVerilog/UVM
  • Development of test plans and execution to plan and coverage goals
  • Development of coverage plans and metrics, drive coverage activities and test writing
  • Development of scripts for automation of the verification process
  • Gate-Level simulation and debug
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Required Experience

  • BSEE/MSEE with at least 10+ years of relevant experience.
  • Well versed in Verilog and SystemVerilog testbench design, stimulus, and debug
  • Able to craft requirements and design specifications into test plan or verification plan documentation and execute to plan and coverage goals
  • Familiar with scripting languages such as Perl, Python, and csh for the purposes of automation and management of large parallel simulation tasks
  • Hands-on experience with standard functional simulators like Questa, NCSIM or VCS
  • Experience running and debugging gate simulations
  • Good written, in-person and remote communication skills
Desired skills:
  • Experience with DFT pattern verification and debug
  • FPGA verification experience
  • Experience with SDF-annotated gate simulations
  • Familiarity with continuous integration infrastructure such as Jenkins
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