Fast, programmable DSP IP
InferX adapts to changing workloads or multiple applications. Use for SDR, 5G, radar, industrial and more.
InferX DSP delivers ~30x the DSP throughput per mm2 of eFPGA.
In N5 29mm2 of silicon can process 68 Billion samples per second of Complex INT16 FFT from 128 to 8K samples – or do 500 Million samples/second using just 0.8 mm2 in N5. InferX is available on 40nm to 18A.
InferX is high accuracy: all accumulations are done at INT40.
InferX is programmed at a high level using Matlab Simulink with a wide library of DSP operators.
InferX is proven in silicon. InferX DSP software and hardware is in development now for a major customer.
Software Defined Radio (SDR)
Software Defined Radio (SDR)
InferX+EFLX with Simulink+InferX Compiler enables small, reconfigurable SDR in your SoCs.
SDR Downlink Rx 1 in 25mm2 of N5
SDR Downlink Rx1 in 25mm2 of N5
Resources can be scaled up or down for different workloads. The internal bandwidth of the EFLX array fabric is Terabytes/second++: ArrayLinx™ mesh interconnect, which connects to the XFLX™ interconnect within each EFLX tile, has 3000 wires per tile in all directions at 1GHz. Learn more in the Software and Hardware sections.
